Integrated circuit (IC) product architecture has evolved to incorporate a number of heterogeneous functions such as central processing unit (CPU) logic, graphics functions, cache memory and other system functions to create integrated system-on-chip (SOC) designs, which may lower product design complexity and number of components for each product. Previously, products may have required that an end customer design a system board using separate packages for the different functions, which may increase a system board area, power loss, and, thus, cost of an integrated solution.
Emerging multichip package substrate solutions may provide chip-to-chip interconnection structures to address the issues above. Electrical performance of current chip-to-chip interconnect solutions may be adversely affected by electrical resistivity of an interconnection substrate that is too low and a dielectric constant of dielectric materials adjacent to electrically conductive features of the interconnection that is too high.